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FPGA AI Suite

FPGAs Play a Vital Role in Enabling Efficient AI Infrastructure

  • FPGAs provide deterministic, low-latency AI inferencing for Edge AI and Physical AI applications.
  • FPGA-based SmartNICs and DPUs assist CPUs, GPUs, and ASICs for AI training and inferencing workloads by offloading data connectivity, data preprocessing, and sensor fusion tasks, resulting in compute cores operating at higher efficiency. 

Altera’s FPGA AI Suite software is a complete solution for creating AI accelerators on Altera FPGAs and SoCs, specifically for teams that want to move quickly, whether you're coming from a software background, an FPGA background, or both. Instead of requiring deep FPGA expertise at every step, the development flow focuses on making model conversion, optimization, and integration easier.

  • Data scientists focus on building and validating models.
  • FPGA engineers integrate  accelerator IP and meeting system constraints like timing and resources.
  • Software integrators connect everything to the host side.

Coordinating these roles can slow projects down when changes are frequent. FPGA AI Suite helps reduce that friction by providing common artifacts and well-defined handoffs between teams.

Easy to Use End-To-End AI Workflow

1. Model: Data scientists work on training the Deep Learning model best suited for the application, using existing AI frameworks (PyTorch, ONNX, etc.).  

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2. Convert: The open-source OpenVINO™ toolkit converts pretrained models to an intermediate representation (IR files, .xml, .bin).

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3. Generate: FPGA AI Suite takes the IR files and creates an estimated area and performance, or generates an optimized architecture, then compiles network files into a .bin to run on the host (FPGA and/or CPU).

  • Inference Runtime: The .bin file is loaded by your application at runtime via Inference Engine and FPGA AI APIs for memory and hardware scheduling.
  • Emulation: Evaluate the FPGA AI IP accuracy using the OpenVINO plugin.

Sample designs show how to run inference on the host (x86, Arm, RISC-V, or hostless).

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4. Deploy: FPGA AI Suite creates a complete AI functional block that is easily incorporated into the rest of the FPGA design, using Altera’s Quartus Prime software and other software tools (Platform Designer, DSP Builder, etc.).

  • FPGA hardware testing: Once the full FPGA design is complete, Quartus software creates a programming file that is downloaded into the target Altera FPGA hardware.
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Spatial Architecture Boosts Edge AI Inference on Altera FPGAs

The new Spatial Compiler generates dedicated RTL, slashing latency by 28x with 80% fewer resources for real-time Physical AI.

Read the blog

Benefits

AI Front End Support

Use your favorite AI front end, such as TensorFlow, Caffe, PyTorch, MXNet, Keras, and ONNX.

Access to Pre-Trained Models

FPGA AI Suite supports most of the models in the Open Model Zoo.

Seamless Pre-Trained Model Conversion

OpenVINO toolkit converts models from most standard frameworks to intermediate representations.

Push-Button Optimized AI IP Generation

FPGA AI Suite seamlessly generates optimal AI inference IP from pre-trained AI model sweeping the design space for optimal resources to performance targets.

Hardware-less Early Model Validation

Bit-accurate software emulation of the AI inference IP is available through the OpenVINO plugin interface, enabling quick evaluation of the accuracy of the model without hardware.

Simple and Standard Flows

Create and add AI inference IP to current or new FPGA designs with Quartus Prime Software and other software tools.

Performance

  • Agilex 5 D-series up to 152 TOPS (INT8)
  • Agilex 5 E-series up to 26 TOPS (INT8)
  • Agilex 3 up to 2.6 TOPS (INT8)
  • Agilex 7 M-Series up to 89 TOPS (INT8) 
     

Low Total Cost of Ownership with Easy System Integration

Integrate AI IP with other system-level components to achieve a smaller footprint and lower power with low latency.