Stratix GX Signal Integrity Center
This page contains links to Stratix® GX device design resources that will help you develop, layout, and verify your high-speed designs.
- Stratix GX Handbook
- Data Sheet
- Application Notes
- White papers
- Characterization Reports (NDA required; contact your local Altera sales team for more information.)
- Full Stratix GX Characterization Reports
- Stratix GX SD-SDI Characterization Report
- Stratix GX HD-SDI Characterization Report
- Stratix GX Fibre Channel Characterization Report
- Stratix GX PCI Express Characterization Report
Altera provides a number of models and design-in kits to help simplify signal integrity simulation and board layout, including:
- IBIS Models
- SPICE Models (1)
- Transceiver VHDL_AMS Models (1)
- Transceiver ELDO Model (1)
- Silicon Design-In Kit for Cadence Allegro Platform (1)
- Silicon Design-In Kit for Mentor Hyperlynx Platform (1)
- Silicon Design-In Kit for Mentor ICX Platform (1)
Design-in kits are available for the Cadence Allegro platform and the Mentor Graphics® ICX and Hyperlynx tools. The kits contain validated models, topology files, layout constraints, example PCB files and footprints, tutorials, documentation, scripts, and other utilities. The kits simplify and speed system modeling and PCB design.
Note:
- Contact mySupport for more information
Related Links
|