Literature Licensing Buy On-Line Download Entire Site Part Number Knowledge DB

Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line

Knowledge Database   |   Devices   |   Design Software   |   Intellectual Property   |   Reference Designs   |   Design Examples   |   mySupport

Products    Quartus II       SOPC Builder       MAX+PLUS II       ModelSim-Altera     Resource Centers       Overview       Installation & Licensing       Scripting       Board Design & I/O       Synthesis & Netlist Viewers       Incremental Compilation       Optimization       Power Management    TimeQuest Timing Analyzer       Classic Timing Analyzer       Simulation & Verification       On-Chip Debugging       HardCopy Design     Software Resources       OS Support       Driver Installation     Download & Licensing       Download    Licensing     Quartus II EDA Support       Quartus II Interface    Synthesis Tools    Simulation Tools    Formal Verification Tools    Timing Analysis Tools    Physical Synthesis Tools    Board Level Tools     Legacy Sw. EDA Support       View by Vendor       View by Tool       View by Function

Home > Support > Design Software > Classic Timing Analyzer Print This Page Subscribe to Email Classic Timing Analyzer Resource Center The Quartus® II software includes the classic timing analyzer that combines powerful features with ease-of-use. For information on the classic timing analyzer, see the following resources: Classic Timing Analyzer Documentation For a brief overview of the classic timing analyzer, refer to the Quartus II Verification and Simulation product feature page. To search for known classic timing analyzer issues and technical support solutions, use Altera’s Knowledge Database. You can also visit the Altera® Forum  to connect and discuss technical issues with other Altera users. For further technical support, use mySupport to create, view, and update service requests. Classic Timing Analyzer Resources Table 1 provides links to available documentation on the classic timing analyzer. Table 1. Classic Timing Analyzer Documentation Title Description Quartus II Classic Timing Analyzer(PDF) This chapter of the Quartus II Development Software Handbook describes the features of the classic timing analyzer. AN 411: Understanding PLL Timing for Stratix II Devices (PDF) This application note describes how to analyze and constrain phase-locked loops (PLLs) using the classic timing analyzer. Performing Equivalent timing Analysis Between Altera Classic Timing Analyzer and Xilinx Trace white paper (PDF) This white paper shows how to perform equivalent static timing analysis between Altera's classic timing analyzer and Xilinx's Trace. Rate This Page

Please Give Us Feedback

Home | Products | Support | End Markets | Technology Center | Education & Events | Corporate | Buy On-Line  Knowledge Database | Devices | Design Software | Intellectual Property | Reference Designs | Design Examples | mySupport  Contact Us | Site Help | Site Map | Privacy | Legal Notice  Copyright © 1995-2008 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus and MegaCore are trademarks of Altera Corporation