Literature Licensing Buy On-Line Download Entire Site Part Number Knowledge DB

Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line

Knowledge Database   |   Devices   |   Design Software   |   Intellectual Property   |   Reference Designs   |   Design Examples   |   mySupport

By End Market       Automotive       Broadcast       Computing       Consumer       Industrial & Military       Wireless       Wireline     By Device       Stratix IV       Stratix III       Stratix II       Stratix II GX       Stratix       Stratix GX       Arria GX       Cyclone III       Cyclone II       Cyclone       MAX II     By Intellectual Property       Embedded Processors       Interfaces & Peripherals       DSP       Communications

Home > Support > Reference Designs > Industrial & Military > PCI Express to DDR2 SDRAM Reference Design Print This Page Subscribe to Email PCI Express to DDR2 SDRAM Reference Design from Altera Corporation Overview Altera offers a PCI Express to DDR2 SDRAM reference design that demonstrates the operation of Altera's PCI Express (PCIe) MegaCore® product. This reference design provides an interface between the Altera® PCIe MegaCore function and  the Altera DDR2 SDRAM Controller MegaCore function that enables access to external DDR2 SDRAM memory through the PCIe bus. It also represents an example of a typical user application that interfaces to the system side of the Altera PCIe MegaCore function. Features Supports PCIe root complex to PCIe end point memory read and write transactions Supports PCIe end point to PCIe root complex direct memory access (DMA) read and write transactions Demonstrates how to use the PCIe MegaCore function Demonstrates how to use the DDR2 SDRAM Controller MegaCore function Also demonstrates how to use the DDR2 SDRAM High-Performance Controller MegaCore function Uses the dual-port FIFO buffer function from the library of parameterized modules (LPM) Supports the Stratix® II GX FPGA with internal transceivers Also supports the ArriaTM GX FPGA with internal transceivers Demonstrated Altera Technology Stratix II GX and Arria GX FPGAs with transceiver technology Altera PCIe MegaCore function Altera DDR2 SDRAM Controller MegaCore function (for the Stratix II GX FPGA version) Altera DDR2 SDRAM High-Performance Controller MegaCore function (for the Arria GX FPGA version) Block Diagram View Full Size Related Links Stratix II GX FPGAs Arria GX FPGAs Altera PCI Express MegaCore Function Altera DDR2 SDRAM High-Performance Controller MegaCore Function Altera DDR2 SDRAM Controller MegaCore Function AN 431: PCI Express to DDR2 SDRAM Reference Design (PDF) Reference Designs Disclaimer These reference design illustrations may be used within Altera Corporation devices only and remain the copyrighted property of Altera. They are being provided on an "as-is" basis and as an accommodation, and therefore all warranties, representations, or guarantees of any kind (whether express, implied or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Altera expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Altera. Rate This Page

Please Give Us Feedback

Home | Products | Support | End Markets | Technology Center | Education & Events | Corporate | Buy On-Line  Knowledge Database | Devices | Design Software | Intellectual Property | Reference Designs | Design Examples | mySupport  Contact Us | Site Help | Site Map | Privacy | Legal Notice  Copyright © 1995-2008 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA Altera, Stratix, Arria, Cyclone, MAX, HardCopy, Nios, Quartus and MegaCore are trademarks of Altera Corporation