Optimization
Quartus® II design software delivers the highest productivity and performance for FPGAs, CPLDs, and HardCopy® ASICs and offers numerous optimization features to enhance the design process:
- Incremental compilation: Optimization
- Physical Synthesis
- Design Space Explorer
- Optimization Advisor
Incremental Compile: Optimization
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- Most productive incremental design methodology for high-density FPGAs
- Reduces design compilation times up to 70 percent
- Improves timing closure by allowing you to target design optimization
- Preserves performance in partitions by leaving them untouched
- Easy to use, industry-first feature
View Video Training Support Handbook (PDF)
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Physical Synthesis
Quartus II software includes the physical synthesis optimization technology. Quartus II physical synthesis options are applied during the fitting stage of the compilation process and can be applied regardless of the synthesis tool used (PDF).
Design Space Explorer
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- Use in the late phases of your design to automatically sweep multiple options to close timing or reduce power consumption
- Fully configurable to maximize design performance or area
- Seeks out the optimum settings for a given design
- Can be set to run for a few hours or a few days depending on your needs
View Video Training Support Handbook (PDF)
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Optimization Advisor
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- Provides you with design-specific advice for optimizing timing performance and resource usage
- Includes recommendations based on your current project settings and assignments
View Video Training Support Handbook (PDF)
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Next Steps
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