from Eureka Technology Inc.
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Features
- Compatible with SD/SDIO specification 2.0 with 1- and 4-bit data transfer
- Supports SD, SPI, SD combo card, and optional 8-bit MMC bus protocol
- Support for both standard-capacity and high-capacity (SDHC) memory cards
- High-speed mode up to 50Mbyte/sec transfer rate
- Simple 32-bit bus master interface to direct memory access (DMA) data into user memory space
- Optional interrupt-based transfer and separate user clock domain
- Selectable maximum block size from 512 to 16 Kbytes
- Processes most commands automatically without help from user logic
- Contains SD and MMC standard slave register set
- Supports multi-function SDIO and combo card, suspend, resume, and read wait
- Choice of user interface bus including AHB, APB, Wishbone, SH4, and Avalon® system interconnect
Block Diagram
Figure 1. Block Diagram
| Table 1. Typical Altera Device Utilization | ||||
| Device | Speed Grade | Utilization Logic Cells | Performance (fMAX ) | Memory |
|---|---|---|---|---|
| Cyclone® III | -7 | 3,338 LEs (1) | 87.8 MHz | 8K memory bits |
| Stratix® III | -3 | 1,912 ALMs (2) | 97.9 MHz | 8K memory bits |
Notes:
Contact Information
For additional information, you can Eureka Technology, Inc. at:
Eureka Technology, Inc.
4962 El Camino Real, Suite 108
Los Altos, CA 94022
Tel. (650) 960-3800
Fax (650) 960-3805
Email: info@eurekatech.com
WWW: http://www.eurekatech.com
