DSP Performance in Stratix II Devices
Stratix® II devices, which feature dedicated digital signal processing (DSP) block circuitry offer higher data processing capacity and are more flexible and cost-effective than discrete DSP processors. DSP processors typically have up to eight dedicated multipliers, whereas Stratix II devices offer up to 384 18x18 dedicated multipliers and additional logic element (LE)-based multipliers.
Stratix II devices are the ideal choice for implementing algorithms that greatly benefit from the large number of multipliers in Stratix II devices, such as finite impulse response (FIR) filters, forward error correction (FEC), modulation-demodulation, and encryption.
Further, with the availability of software tools such as the Altera® DSP Builder (an interface between the Quartus® II software and the MATLAB/Simulink tool), Stratix II devices can be used to implement entire DSP systems such as RAKE receivers and wideband code division multiple access (W-CDMA) transmitters.
Higher Data Throughput
Each DSP block in Stratix II devices can run at 450 MHz and provide data throughput of 3.6 giga multiply-accumulates per second (GMACS) per DSP block. The largest Stratix II device, the EP2S180 device, offers 96 DSP blocks that can perform up to 384 18-bit x18-bit parallel multiplications and provide a combined data throughput of up to 173 GMACS. Traditional DSP processors can perform only up to four 18-bit x 18-bit parallel multiplications and can provide only up to 2.8 GMACS of throughput. Stratix II FPGAs offer 50x more DSP throughput over DSP processors.
Soft Multipliers Extend DSP Bandwidth
In addition to the embedded multipliers available in DSP blocks, TriMatrix™ memory can be used as soft multipliers that are based on a look-up table (LUT) implementation of multiplication operation. Soft multipliers also support distributed arithmetic functions that provide optimal resource balance between memory and LE utilization of several DSP algorithms such as finite impulse response (FIR) filters. Soft multipliers extend the DSP bandwidth available in Stratix II DSP blocks by 300%.
Using ALMs to Implement Multipliers
For very multiplication-intensive applications, Stratix II can implement additional multipliers and DSP functions using adaptive logic modules (ALMs). For multiplication operations, partial products are generated and then summed together. Stratix II can implement the partial product in the 4-input LUT in front of the full adder in the same ALM. In the partial products summation step, Stratix II's 3-input adding feature significantly compresses the number of add stages which allows for improved performance and less logic usage.
The different DSP features in Stratix II can be used for implementing performance-critical DSP functions in hardware. These functions would otherwise consume much of the DSP processor's processing power, thereby slowing down the overall system performance. Stratix II devices can be used as FPGA co-processors in DSP systems.
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