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Stratix II |
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HardCopy II |
The synergy Altera delivers gives you more than just the sum of two parts. Beyond the inherent flexibility you receive from Stratix® II FPGAs and the low cost of HardCopy® II ASICs, the seamless migration between the two devices provides you with many new ways to get to market with lower risk and with more impressive products.
Unique FPGA Front-End Design Methodology
Develop your designs with Quartus® II software and the EDA tools of your choice, and then test your designs with Stratix II, the industry’s highest density, highest performance FPGAs. Once your design is fully verified, Altera’s HardCopy Design Center seamlessly migrates the design to a low-cost, pin-compatible HardCopy II ASIC.
HardCopy II ASICs provide all these benefits:
- Dramatically lower power and cost compared to FPGAs
- Lower non-recurring engineering (NRE) cost and effort compared to standard cell ASICs
- Fast time to prototype
- Secure, tamper-proof design implementation
Focus on Creating Breakthrough Products
At the beginning of a project, many designers face a dilemma—to either create innovative breakthrough products or target the lowest possible bill-of-material costs.
Altera gives you the power to prove the product’s success before investing in ASIC development. Instead of worrying about costs, you can focus on innovating new concepts using Stratix II FPGAs and get to market fast, while protecting your intellectual property (IP). You can even generate multiple variations of the basic design for different geographies or market segments.
When it makes sense to go into high-volume production, you can replace the FPGA with a pin-compatible, lower cost HardCopy II ASIC. There is no need to commit to ASIC silicon until after you have proven your design in the market.
Now you have the freedom to create exciting new products, instead of spending your effort on cost-reducing existing products.
Non-Volatile Design Security
Many companies want to demonstrate their products using a programmable device before committing to an ASIC. In some cases, they need to ensure their design will not be reverse engineered. If the system is mission-critical and it uses an FPGA early in the testing or production phase of the product, they must assure their customers that the systems, once deployed to the field, are tamper-proof.
Stratix II devices offer the only high density, non-volatile FPGA design security available to protect your IP from the risk of theft, corruption, or reverse engineering. With Stratix II and HardCopy II, you only have to design once for a secure product. Once your design is final, you can migrate the design to a secure, tamper-proof HardCopy II ASIC for high-volume applications, having ensured you have the right mix of product features and functionality for your target market.
New Flexibility in Product Life Cycles
Stratix II FPGAs and HardCopy II ASICs enable new flexibility for product life cycles (see Figure 1):
- Add features and functions to respond to rapidly evolving market needs
- Use Stratix II FPGAs for low-volume production, or for initial production when you intend to migrate to high-volume production
- Manufacture high-volume products with HardCopy II ASICs
- Go back to FPGAs to generate new products and maintain market leadership
Figure 1. Solution for the Entire Product Life Cycle
Use either FPGAs or HardCopy ASICs during the product life cycle. The decision to go to HardCopy II ASICs can be based on actual product success. This flexibility enables you to capitalize on market opportunities with low risk.
Synergy Achieved
The flexibility of Stratix II FPGAs and the low cost of HardCopy II ASICs enhance your market opportunities. When you add in guaranteed device availability and supply chain management that is second-to-none, why risk your next design on anything else when Altera is the only company that has it all?
See how other companies have used the synergy of Altera’s high-end logic products to achieve success.
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