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Home > Products > Devices > Cyclone III > Overview Print This Page Subscribe to Email Cyclone III FPGA Family Overview The low-cost Cyclone® III FPGA family is the third generation in the Altera® Cyclone series. With its unprecedented combination of low power, high functionality, and low cost, the Cyclone III FPGA family broadens the number of high-volume, cost-sensitive applications that can benefit from FPGAs. Built on Taiwan Semiconductor Manufacturing Company's (TSMC's) 65-nm low-power process technology, Cyclone III devices have additional silicon and software optimizations to offer the lowest power consumption of any 65-nm FPGA and an optimal set of features to drive high-bandwidth parallel processing along with many other cost-sensitive and power-sensitive applications. The Cyclone III family is composed of eight devices ranging from 5K to 120K logic elements (LEs) and up to 535 user I/O pins. As shown in Table 1, Cyclone III devices offer up to 4-Mbit of embedded memory, 288 embedded 18-bit x 18-bit multipliers, dedicated external memory interface circuitry, phase-locked loops (PLLs), and high-speed differential I/O capabilities. The Cyclone III FPGA family offers a broad range of devices and package options to support a wide variety of cost-sensitive high-volume applications. Cyclone III devices are available in up to three temperature grades to support varying operating environments with junction temperature support from -40°C to 125°C. Please refer to the Cyclone III Device Handbook for more information. Table 1. Cyclone III FPGA Overview Device EP3C5 EP3C10 EP3C16 EP3C25 EP3C40 EP3C55 EP3C80 EP3C120 Logic Elements 5,136 10,320 15,408 24,624 39,600 55,856 81,264 119,088 M9K Embedded Memory Blocks (1) 46 46 56 66 126 260 305 432 Total RAM (Kbits) 414 414 504 594 1,134 2,340 2,745 3,888 Embedded 18-bit x 18-bit Multipliers 23 23 56 66 126 156 244 288 PLLs 2 2 4 4 4 4 4 4 Maximum User I/O Pins 182 182 346 215 535 377 429 531 Differential Channels 70 70 140 83 227 163 181 233 Availability (2) Buy Now Buy Now Buy Now Buy Now Buy Now Buy Now Buy Now Buy Now Note: M9K memory blocks offer 9,216 bits per block (including parity bits). Learn more about industrial, extended industrial, and automotive temperature device options. As shown in Table 2, the Cyclone III device family is available in nine different package options with support for low-cost and small form factor packages. Table 2. Cyclone III Device Packages and Maximum User I/Os (1) Device/Package (mm x mm) 144-Pin EQFP (22 x 22) (2) 164-Pin MBGA (8 x 8) (7) 240-Pin PQFP (32 x 32) (3) 256-Pin FBGA (17 x 17) (4) 256-Pin UBGA (14 x 14) (5) 324-Pin FBGA (19 x 19) 484-Pin FBGA (23 x 23) 484-Pin UBGA (19 x 19) 780-Pin FBGA (29 x 29) EP3C5 94 106 - 182 182 - - - - EP3C10 94 106 - 182 182 - - - - EP3C16 84 92 160 168 168 - 346 346 - EP3C25 82 - 148 156 156 215 - - - EP3C40 - - 128 - - 195 331 331 535 (6) EP3C55 - - - - - - 327 327 377 EP3C80 - - -  - - - 295 295 429 EP3C120 - - - - - - 283 - 531 Notes: Color denotes vertical migration                  EQFP = Enhanced Thin Quad Flat Pack                  PQFP = Plastic Quad Flat Pack                  FBGA = FineLine Ball-Grid Array (1.0-mm pitch) UBGA = Ultra FineLine Ball-Grid Array (0.8-mm pitch) EP3C40 in the F780 package supports restricted vertical migration MBGA = Micro Ball-Grid Array (0.5-mm pitch) Table 3 shows the speed grades for Cyclone III devices. Table 3. Cyclone III Family Speed Grades (1), (2) Device 144-Pin EQFP 164-Pin MBGA 240-Pin PQFP 256-Pin FBGA 256-Pin UBGA 324-Pin FBGA 484-Pin FBGA 484-Pin UBGA 780-Pin FBGA EP3C5 -7, -8 -7, -8 - -6, -7, -8 -6, -7, -8 - - - - EP3C10 -7, -8 -7, -8 - -6, -7, -8 -6, -7, -8 - - - - EP3C16 -7, -8 -7, -8 -8 -6, -7, -8 -6, -7, -8 - -6, -7, -8 -6, -7, -8 - EP3C25 -7, -8 - -8 -6, -7, -8 -6, -7, -8 -6, -7, -8 - - - EP3C40 - - -8 - - -6, -7, -8 -6, -7, -8 -6, -7, -8 -6, -7, -8 EP3C55 - - - - - - -6, -7, -8 -6, -7, -8 -6, -7, -8 EP3C80 - - - - - - -6, -7, -8 -6, -7, -8 -6, -7, -8 EP3C120 - - - - - - -7, -8 - -7, -8 Notes: Cyclone III devices are available in up to three speed grades, with -6 being the fastest. For Cyclone III devices, Altera's guideline for core fMAX change between each speed grade is on average 15 to 20 percent.  Related Links View the Cyclone III FPGA Webcasts Download the Cyclone III Device Handbook (PDF) Download Altera's Device Information Package Data Sheet See the Differences Between Cyclone II and Cyclone III FPGAs Rate This Page   Next Steps View Webcast Download Software Get Training Read Success Stories View Video Buy Now Purchase Dev Kits Purchase Devices Support Get Device Support View Knowledge Database Use Troubleshooter Join the Altera Forum Documentation Get Literature Get Handbook Get Data Sheet Get Email Updates Get Product Catalog

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