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Cyclone III DSP Solutions—An Unprecedented Combination of Power, Functionality, and Cost

In digital signal processing (DSP) applications, Cyclone® III FPGAs provide an unprecedented combination of  low power consumption, impressive DSP functionality, and low cost.

You can use Cyclone III FPGAs alone or as DSP coprocessors to improve price-to-performance ratios for DSP applications including video and image processing, wireless communications systems, and common DSP functions.

DSP Resources

Cyclone III devices include an optimized set of DSP features and are supported by Altera's full set of DSP flows. The DSP support resources offered by Cyclone III FPGAs are summarized in Table 1.

Table 1. DSP Resources Offered by Cyclone III FPGAs
Resource Description
Hardware Resources
  • Up to 288 18 x 18 multipliers with up to 260-MHz performance
  • Up to 4 Mbit of embedded memory
  • High performance auto-calibrating interfaces to external memory such as DDR and DDR2 SDRAM
Design Resources
  • DSP intellectual property (IP) cores
    • Includes common DSP processing functions like finite impulse response (FIR), fast Fourier transform (FFT), and numerically controlled oscillator (NCO) functions
    • Video and image processing suite
  • DSP Builder interface tool between The MathWorks Simulink and MATLAB design environment and the Altera® Quartus® II development software
  • Cyclone III FPGA Starter Kit
  • Cyclone III DSP Development Kit (coming in October 2007)
 

Low-Cost DSP Processing Applications

Cyclone III devices have been optimized for low-cost DSP applications such as

Other examples are listed in Table 2.

Table 2. Cyclone III DSP Applications
Broadcast and Consumer Wireline and Wireless Communications
  • Displays
  • HDTV
  • Set-Top Boxes
  • Cameras
  • Audio/Visual Conference Equipment 
  • HDTV Camcorders
  • Wireless Base Stations
  • Digital Subscriber Line Access Multiplexer (DSLAM) Systems
  • Wireless LAN Access Point
Automotive Military, Industrial & Medical
  • Navigation Systems
  • Satellite Radio Receiver
  • Hybrid Television Receiver
  • Telematics
  • Entertainment
  • Software Defined Radio
  • Medical Imaging (e.g., MRI, X-ray)
  • Video Displays
  • Video Surveillance
  • Radars
  • Network Test Equipment

Learn more about how Cyclone III FPGAs can fit into your applications.

Embedded Multiplier Details

The embedded multipliers in Cyclone III FPGAs are capable of implementing the simple multiplication operation commonly used in typical DSP functions. Cyclone III devices offer up to 288 embedded multiplier blocks and support the following modes: one individual 18-bit ×18-bit multiplier per block, or two individual 9-bit × 9-bit multipliers per block (Figure 1). Multipliers can be cascaded to support wider bit widths. The Quartus II software includes megafunctions that control the mode of operation of the embedded multiplier blocks based on user parameter settings. Multipliers can also be inferred directly from VHDL or Verilog source code.

Figure 1. Embedded Multipliers in Cyclone III Devices

Figure 1. Embedded Multipliers in Cyclone III Devices

The embedded multiplier supports both signed and unsigned multiplication. It also offers optional input and output registers for increased performance.

The embedded multipliers are also seamlessly integrated with the embedded memory blocks in Cyclone III FPGAs. This provides an efficient implementation of DSP algorithms that uses both multiplication and memory operations, such as FIR filters and video processing. Table 3 shows the number of multipliers available in Cyclone III FPGAs.

Table 3. Number of Multipliers Available in Cyclone III Devices (1)(2)
Device LEs 18-Bit x18-Bit Multipliers 9-Bit x 9-Bit Multipliers
EP3C5 5,136 23 46
EP3C10 10,320 23 46
EP3C16 15,408 56 112
EP3C25 24,624 66 132
EP3C40 39,600 126 252
EP3C55 55,856 156 312
EP3C80 81,264 244 488
EP3C120 119,088 288 576

Notes:

  1. The number of multipliers in the two columns is not additive (that is, the EP3C5 device offers 23 18-bit x 18-bit multipliers or 46 9-bit x 9-bit  multipliers, but not both).
  2. Multipliers are cascaded automatically by the Quartus II software and third-party synthesis software to support wider bit-width multiplications.

Embedded Multiplier Performance

Capable of running in parallel at 260 MHz, the embedded multipliers in Cyclone III devices eliminate the performance bottleneck in complex arithmetic calculations and increase overall DSP system throughput by orders of magnitude. Cyclone III devices can be used as FPGA coprocessors for DSP applications that offload complex arithmetic computations from the DSP processor and boost overall system performance for lower system costs.

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