| Table 1. Cyclone II FPGA Features at a Glance |
| Feature |
Description |
| Cost-Optimized Architecture |
The Cyclone II architecture is optimized for the lowest cost and offers up to 68,416 logic elements (LEs)—more than 3x the density of first-generation Cyclone FPGAs. The logic resources in Cyclone II FPGAs can be used to implement complex applications. |
| High Performance |
Cyclone II FPGAs are 60 percent faster than competing low-cost 90-nm FPGAs, making them the highest performing low-cost 90-nm FPGAs on the market. |
| Low Power |
Cyclone II FPGAs are half the power of competing low-cost 90-nm FPGAs, dramatically reducing both static and dynamic power. |
| Process Technology |
Cyclone II FPGAs are manufactured on 300-mm wafers using TSMC's leading-edge 90-nm, low-k dielectric process technology. |
| Embedded Memory |
Cyclone II FPGAs offer up to 1.1 Mbits of embedded memory through the popular M4K memory blocks, which can be configured to support a wide range of operation modes including RAM, ROM, first-in first-out (FIFO) buffers, and single-port and dual-port modes. |
| Embedded Multipliers |
Cyclone II FPGAs offer up to 150 18 x 18 multipliers that are ideal for low-cost digital signal processing (DSP) applications. These multipliers are capable of implementing common DSP functions such as finite impulse response (FIR) filters, fast Fourier transforms (FFTs), correlators, encoders/decoders, and numerically controlled oscillators (NCOs). |
| External Memory Interfaces |
Cyclone II FPGAs provide support for external memory interfaces, which allow you to integrate external SDR, DDR, and DDR2 SDRAM devices, and QDRII SRAM devices at data rates up to 668 Mbps. |
| Differential I/O Support |
Cyclone II FPGAs offer differential signaling support for the LVDS, RSDS, mini-LVDS, LVPECL, SSTL, and HSTL I/O standards. LVDS is supported at data rates up to 805 Mbps on the receiver side and up to 622 Mbps on the transmitter side. |
| Single-Ended I/O Support |
Cyclone II FPGAs support a variety of single-ended I/O standards, such as the LVTTL, LVCMOS, SSTL, HSTL, PCI, and PCI-X standards needed for today's systems. |
| Interfaces and Protocols Support |
Cyclone II FPGAs support a number of different interfaces and protocols including a wide range of communications protocols such as Ethernet, PCI Express with an external PHY, and other general-purpose interfaces. |
| Clock Management Circuitry |
Cyclone II FPGAs feature up to four programmable phase-locked loops (PLLs) and up to 16 global clock lines, providing robust clock management and frequency synthesis capabilities for maximum system performance. These PLLs offer advanced features such as frequency synthesis, programmable phase shift, external clock output, programmable duty cycle, programmable bandwidth, spread-spectrum input clocking, lock detection, and differential signal support on the input and output clocks. |
| Nios II Embedded Processor |
The Nios® II embedded processor for Cyclone II devices reduces cost, increases flexibility, and offers an ideal replacement for low-cost discrete microprocessors. |
| On-Chip Termination |
Cyclone II FPGAs support driver impedance matching and on-chip series termination. On-chip termination eliminates the need for external resistors, improves signal integrity, and simplifies board design. Cyclone II FPGAs also support parallel and differential termination through external resistors. |
| Fast On Capability |
Select Cyclone II FPGAs offer fast on capability, allowing them to be operational soon after power up, making them ideal for automotive and other applications where quick start-up time is essential. Cyclone II FPGAs, which offer a faster power-on reset (POR) time, are designated with an “A” in the device ordering code (EP2C5A, EP2C8A, EP2C15A, and EP2C20A). |
| Hot Socketing and Power Sequencing |
Cyclone II FPGAs offer robust on-chip hot-socketing and power-sequencing support that ensures proper device operation independent of the power-up sequence. This feature also protects the device and tri-states I/O buffers before and during power-up, making Cyclone II devices ideal for multi-voltage systems as well as applications that require high availability and redundancy. |
| Automatic Cyclic Redundancy Code Checking |
Cyclone II devices feature automatic 32-bit cyclic redundancy code checking. A single click in Quartus® II software (versions 4.1 and later) simplifies setup and activates the device's built-in cyclic redundancy code checker. It is the most cost-effective FPGA solution available for single event upset (SEU). |
Differences Between
Cyclone II and Cyclone FPGAs |
Cyclone II FPGAs offer new and advanced features when compared to Cyclone FPGAs. These features include embedded multipliers, external memory interface support for DDR2 and QDRII memory devices, on-chip series termination, and support for more differential and single-ended I/O standards. |
| Serial Configuration Devices |
Cyclone II devices can be configured with Altera’s low-cost serial configuration devices, which provide up to 64 Mbits of flash memory. |
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