 |
|
High-End FPGAs
|
Description/Unique Features |
|
 |
- Fourth-generation Stratix® FPGA family.
- Highest performance, highest density, and lowest power.
- Best-in-class 8.5-Gbps transceivers and high-performance memory interfaces deliver unprecedented system bandwidth with superior signal integrity.
|
|
 |
- Third-generation Stratix FPGA family, the industry’s lowest power, high-performance 65-nm FPGAs, recommended for designs starting now.
- Logic rich (L), enhanced for memory and digital signal processing (DSP) (E), and transceiver-based (GX) variants.
- Targets high-end core system processing designs, supported by industry leading FPGA design tools. Risk-free path to HardCopy® ASICs.
|
|
 |
- Second-generation high-performance 90-nm FPGA family, recommended for production projects now.
- Includes best-in-class 6.375-Gbps GX transceiver variant available today.
- Advanced FPGA architecture, high-performance adaptive logic module (ALM) with 8-input fracturable look-up table (LUT), large on-chip memory, embedded DSP blocks, and high-speed external interface support. Risk-free path to HardCopy ASICs.
|
|
 |
- First-generation Stratix FPGA family. Stratix II and Stratix III families now provide higher performance at lower cost.
- Mid-performance, embedded DSP blocks, on-chip memory, flexible I/O.
- Broad range of IP support including Nios II processors.
|
|
|
Midrange FPGAs
|
|
 |
- Midrange, risk-free FPGAs with transceivers.
- Optimized for PCIe, GbE, and Serial Rapid IO® (SRIO).
- Simple solution for bridging and end-point applications.
|
|
|
Low-Cost FPGAs
|
|
 |
- Third-generation in the Cyclone® series of lowest cost FPGAs.
- Unprecedented combination of power, functionality, and cost.
- Broad range of intellectual property (IP) support including Nios® II embedded processor support.
|
|
 |
- Second-generation in the lowest cost FPGA series.
- Embedded 18x18 DSP multipliers, on-chip memory, and mid-range speed I/O.
- Broad range of IP support, including Nios II embedded processor support.
|
|
 |
- First-generation in the lowest cost FPGA series, where cost is paramount.
- On-chip memory, lower density applications, low to moderate speed I/O.
- Broad range of IP support including Nios II embedded processor support.
|
|
|
Low-Cost CPLDs
|
|
 |
- Instant-on, non-volatile, single-chip CPLD solution.
- Lowest cost, lowest power (1/10th of MAX® CPLD), highest density CPLD.
- On-board user flash memory. 1.8-V, 2.5-V, and 3.3-V supply voltages.
|
|
 |
- Instant-on, non-volatile, low-cost CPLD for low density solutions.
- Deterministic timing.
- 5.0-V I/O support. 2.5-V, 3.3-V, and 5.0-V supply voltages.
|
|
|
HardCopy ASICs
|
|
 |
- Fifth-generation in the HardCopy® ASIC series.
- Benefits of FPGA and benefits of ASIC deliver fast time-to-market and fast time-to-profit.
- HardCopy IV GX devices with 6.5-Gbps transceivers and high-performance memory interfaces deliver excellent system bandwidth with superior signal integrity.
|
|
 |
- Benefits of FPGA and benefits of ASIC deliver fast time-to-market and fast time-to-profit.
- Low risk, low total cost ASIC for high-volume production.
- Low-risk prototyping using Stratix III FPGAs for true software/hardware co-design and fast system readiness.
|
|
 |
- Low-cost HardCopy ASIC for high-volume production.
- Migrate Stratix II FPGA prototype to functionally equivalent, pin-compatible device.
- Increase core performance and reduce power by 50–70 percent compared to Stratix II FPGA prototype.
|
|
 |
- Low-risk migration from Stratix FPGA as prototype to ASIC.
- Low-cost ASIC for high-volume production.
- Supported by all major EDA vendors, 40 percent lower power than Stratix FPGAs, and a 50 percent performance increase.
|
Literature
> 
