Arria GX Device Family Architecture
The core fabric of Arria™ GX FPGAs is built from innovative and efficient logic units known as adaptive logic modules (ALMs). The ALMs are routed with the MultiTrack interconnect architecture, enabling Arria GX devices to implement logic, arithmetic, and register functions.
Adaptive Logic Module
The ALM is built with an extremely fracturable look-up table (LUT) that enables Arria GX FPGAs to pack logic without wasting logic resources. The ALM fracturability provides the much needed flexibility to map any digital design efficiently. Each ALM consists of eight inputs, two dedicated adders, two registers, and two outputs, as shown in Figure 1. Table 1 describes the features of the ALM and Figure 2 shows the various configurations the ALM supports.
Figure 1. Arria GX ALM
| Table 1. Available Arria GX Features Per ALM |
| Features |
Description |
| 8-Input Fracturable LUT |
The fracturable LUT can implement a full 6-input LUT, select 7-input LUTs, or two independent outputs of multiple combinations of smaller LUT sizes for efficient logic packing. |
| Two Dedicated Full Adders |
Allow for two bits of addition per ALM or a single ternary adder without additional resources. |
| Two Dedicated Registers |
Optimal register-to-logic ratio for register-rich applications. |
| Two Outputs |
The inputs of a single ALM can be flexibly divided between the two output functions, allowing wide input functions to run fast and narrow input functions to efficiently use remaining resources. |
Figure 2. Arria GX ALM Configurations for High Efficiency
The MultiTrack Interconnect
Arria GX FPGAs also leverage the MultiTrack interconnect technology. This technology consists of continuous, performance-optimized routing lines of different lengths used for communication within and between distinct design blocks.
The MultiTrack interconnect technology shown in Figure 3 is used in Arria GX FPGAs to:
- Provide the industry's best connectivity by providing more accessibility to any surrounding LABs with fewer connections, thus improving performance and lowering power
- Avoid area congestion to provide better logic packing
Figure 3. Arria GX FPGA MultiTrack Interconnect Connectivity
Arria GX Logic Structure Benefits
- Overall reduction in the number of logic levels required by packing more combinational logic efficiently
- Fully integrated with Quartus® II software to optimally utilize the 8-input fracturable LUT in the ALM and the routing interconnect architecture in the core
- Ultimately lowers costs for implementation of large digital designs in a smaller area
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