Altera Home Page
Literature Licensing
Buy On-Line Download

  Home   |   Products   |   Support   |   End Markets   |   Technology Center   |   Education & Events   |   Corporate   |   Buy On-Line  
  Devices   |   Design Software   |   Intellectual Property   |   Design Services   |   Dev. Kits/Cables   |   Literature  

 High-End FPGAs
      About Stratix Series
   Stratix IV (E and GX)
   Stratix III (L and E)
   Stratix II (and GX)
   Stratix (and GX)
  
 Midrange FPGAs
   Arria (GX)
  
 Low-Cost FPGAs
   Cyclone III
   Cyclone II
   Cyclone
  
 CPLDs
   MAX II (and G, Z)
   MAX 3000A
  
 ASICs
      About HardCopy Series
   HardCopy IV (E and GX)
   HardCopy III
   HardCopy II
   HardCopy Stratix
  
 Device-Specific Offerings
   RoHS Compliant
      Extended Temperature
      Industrial Temperature
      Military Temperature
      Automotive Temperature
  
 Configuration Devices
   Enhanced Configuration
   Serial Configuration
  
 Mature Products
      Product Listing
  

ACEX 1K Device Family

Altera's ACEX® 1K device family provides industry-leading low-cost devices for low-density design needs. For mid- and high-density designs, check out Altera's new lowest-cost FPGAs, the Cyclone™ II and Cyclone device families. The ACEX 1K device family offers low-density FPGAs that are ideal for price-sensitive applications, with price points as low as $3.25. The ACEX 1K device family operates at 2.5 V and can interface with 5.0-V, 3.3-V, and 2.5-V I/O circuitries.

ACEX 1K Description

ACEX 1K devices range in density from 576 to 4,992 logic elements (LEs) and provide optimum performance and features that enable the effective implementation of low-cost, low-density applications.

All ACEX 1K devices feature high-performance embedded RAM blocks that can implement dual-port RAM, read-only memory (ROM), first-in first-out buffers (FIFO) or logic. Full 64-bit, 66-MHz peripheral component interconnect (PCI) support is provided in order to fulfill a key requirement in high-performance communications systems. ACEX devices also feature phase-locked loops (PLLs) for clock management, including the ClockLock® feature to improve I/O performance and the ClockBoost® feature to multiply the system clock inside the ACEX 1K device. ACEX 1K devices also feature MultiVolt™ I/O operation, enabling them to interface with devices running at 5.0 V, 3.3 V, and 2.5 V. ACEX 1K devices utilize low-cost packaging technologies, including advanced FineLine BGA™ packages featuring the SameFrame™ migration capability.

image 6
image 2 image 2 image 3
image 4 image 5
image 7 image 8 figure 9

Software Support & Availability

ACEX 1K devices are available today and are supported by the Quartus II Web Edition Software. The Quartus II Web Edition software includes a complete environment for programmable logic device (PLD) design, including schematic- and text-based design entry, hardware description language (HDL) synthesis, place-and-route, verification, and programming. The Quartus II Web Edition software removes all barriers for designing and evaluating Altera® device architectures for high-performance applications. ACEX 1K devices are also supported in the MAX+PLUS II BASELINE software.

Related Links


Download the Free Quartus II Web Edition Software

  Please Give Us Feedback