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Home > Products > Literature > SOPC Builder Print This Page Subscribe to Email Literature: SOPC Builder This page provides links to the SOPC Builder volume of the Quartus® II Development Software Handbook and other documents related to SOPC Builder. The SOPC Builder volume provides an introduction to all SOPC Builder features, complete usage reference, and tutorials for building custom systems. Click the links below to view and download the entire volume, or any individual section or chapter. For more SOPC Builder support, visit the SOPC Builder Support web page. Volume 4: SOPC Builder (ver 8.0, Jun 2008, 1 MB) Section I. SOPC Builder Features (6 MB) Chapter 1. Introduction to SOPC Builder (ver 8.0.0, May 2008, 113 KB) Chapter 2. System Interconnect Fabric for Memory-Mapped Interfaces (ver 8.0.0, May 2008, 207 KB) Chapter 3. System Interconnect Fabric for Streaming Interfaces (ver 8.0.0, May 2008, 139 KB) Chapter 4. SOPC Builder Components (ver 8.0.0, May 2008, 114 KB) Chapter 5. Using SOPC Builder with the Quartus II Software (ver 8.0.0, May 2008, 151 KB) Chapter 6. Component Editor (ver 8.0.0, May 2008, 132 KB) Chapter 7. Component Interface Tcl Reference (ver 8.0.1, Jun 2008, 294 KB) Chapter 8. Archiving SOPC Builder Projects (ver 8.0.0, May 2008, 93 KB) Section II. Building Systems with SOPC Builder (552 KB) Chapter 9. SOPC Builder Memory Subsystem Development Walkthrough (ver 8.0.0, May 2008, 357 KB) Chapter 10. SOPC Builder Component Development Walkthrough (ver 8.0.0, May 2008, 137 KB) Design Example Section III. Interconnect Components (453 KB) Chapter 11. Avalon Memory-Mapped Bridges (ver 8.0.0, May 2008, 216 KB) Chapter 12. Avalon Streaming Interconnect Components (ver 8.0.0, May 2008, 155 KB) Volume 5: Embedded Peripherals (ver 8.0, May 2008, 4 MB) Section I. Off-Chip Interface Peripherals (2 MB) Chapter 1. SDRAM Controller Core (ver 8.0.0, May 2008, 266 KB) Chapter 2. CompactFlash Core (ver 8.0.0, May 2008, 119 KB) Chapter 3. Common Flash Interface Controller Core (ver 8.0.0, May 2008, 110 KB) Chapter 4. EPCS Device Controller Core (ver 8.0.0, May 2008, 123 KB) Chapter 5. JTAG UART Core (ver 8.0.0, May 2008, 180 KB) Chapter 6. UART Core (ver 8.0.0, May 2008, 259 KB) Chapter 7. SPI Core (ver 8.0.0, May 2008, 238 KB) Chapter 8. Optrex 16207 LCD Character Controller Core (ver 8.0.0, May 2008, 102 KB) Chapter 9. PIO Core (ver 8.0.0, May 2008, 143 KB) Chapter 10. Avalon-St JTAG Interface Core (ver 8.0.0, May 2008, 136 KB) Chapter 11. Avalon-ST Serial Peripheral Interface Core (ver 8.0.0, May 2008, 189 KB) Chapter 12. SPI Slave/JTAG to Avalon Master Bridge Cores (ver 8.0.0, May 2008, 226 KB) Chapter 13. PCI Lite Core (ver 8.0.0, May 2008, 348 KB) Section II. On-Chip Storage Peripherals (1 MB) Chapter 14. Avalon-ST Single Clock and Dual Clock FIFO Cores (ver 8.0.0, May 2008, 189 KB) Chapter 15. On-Chip FIFO Memory Core (ver 8.0.0, May 2008, 260 KB) Chapter 16. Avalon-ST Multi-Channel Shared Memory FIFO Core (ver 8.0.0, May 2008, 198 KB) Section III. Transport and Communication (1 MB) Chapter 17. Avalon Streaming Channel Multiplexer and Demultiplexer Cores (ver 8.0.0, May 2008, 155 KB) Chapter 18. Avalon-ST Bytes to Packets and Packets to Bytes Converter Cores (ver 8.0.0, May 2008, 195 KB) Chapter 19. Avalon Packets to Transactions Converter Core (ver 8.0.0, May 2008, 133 KB) Chapter 20. Avalon-ST Round Robin Scheduler Core (ver 8.0.0, May 2008, 135 KB) Section IV. Peripherals (2 MB) Chapter 21. Scatter-Gather DMA Controller Core (ver 8.0.0, May 2008, 305 KB) Chapter 22. DMA Controller Core (ver 8.0.0, May 2008, 210 KB) Chapter 23. Video Sync Generator and Pixel Converter Cores (ver 8.0.0, May 2008, 135 KB) Chapter 24. Timer Core (ver 8.0.0, May 2008, 195 KB) Chapter 25. System ID Core (ver 8.0.0, May 2008, 89 KB) Chapter 26. Mutex Core (ver 8.0.0, May 2008, 114 KB) Chapter 27. Mailbox Core (ver 8.0.0, May 2008, 124 KB) Section V. Test and Debug Peripherals (1 MB) Chapter 28. Performance Counter Core (ver 8.0.0, May 2008, 180 KB) Chapter 29. Avalon Streaming Test Pattern Generator and Checker Cores (ver 8.0.0, May 2008, 268 KB) Section VI. Clock Control Peripherals (1 MB) Chapter 30. PLL Core (ver 8.0.0, May 2008, 143 KB) Embedded Design Handbook (ver 1.1, Jun 2008, 4 MB) Section I. Introduction (297 KB) Chapter 1. First-Time Designer's Guide (ver 1.1, Jun 2008, 291 KB) Section II. Nios II Software Development (2 MB) Chapter 2. Developing Nios II Software (ver 1.1, Jun 2008, 579 KB) Chapter 3. Debugging Nios II Designs (ver 1.1, Jun 2008, 1 MB) Chapter 4. Nios II Command-Line Tools (ver 1.1, Jun 2008, 266 KB) Chapter 5. Optimizing Nios II C2H Compiler Results (ver 1.1, Jun 2008, 511 KB) edh_c2h_optimization_design_files.zip Section III. System Level Design (774 KB) Chapter 6. Avalon Memory-Mapped Design Optimizations (ver 1.1, Jun 2008, 345 KB) Chapter 7. Memory System Design (ver 1.1, Jun 2008, 196 KB) Chapter 8. Hardware Acceleration and Coprocessing (ver 1.1, Jun 2008, 170 KB) Chapter 9. Verification and Board Bring-Up (ver 1.1, Jun 2008, 199 KB) Related Documentation User Guides System Console User Guide (ver 1.0, May 2008, 200 KB) Design Files for System Console ( 206 KB) Nios II Custom Instruction User Guide (ver 1.5, Jun 2008, 701 KB) Design Files for Nios II Custom Instruction User Guide ( 19 KB) Application Notes AN 532: An SOPC Builder PCI Express Design with GUI Interface (ver 1.0, Jun 2008, 285 KB) Design Files for AN 532 ( 5 MB) AN 531: Reducing Power with Hardware Accelerators (ver 1.0, May 2008, 151 KB) Design Files for AN 531 ( 1 MB) AN458: Alternative Nios II Boot Methods (ver 1.0, Nov 2007, 336 KB) AN458 design example files ( 30 KB) Default boot loader sources ( 17 KB) AN 323: Using SignalTap II Embedded Logic Analyzers in SOPC Builder Systems (ver 1.1, Nov 2007, 386 KB) AN 398: Using DDR/DDR2 SDRAM With SOPC Builder (ver 1.1, Aug 2006, 775 KB) AN 346: Using the Nios Development Board Configuration Controller Reference Designs (ver 1.1, Aug 2006, 307 KB) White Papers Comparing IP Integration Approaches for FPGA Implementation (ver 1.1, Feb 2008, 195 KB) Selector Guides Altera Product Catalog (ver 5.0, Jul 2008, 2 MB) Functional Specifications Avalon Interface Specifications (ver 1.0, Mar 2008, 583 KB) (Replaces "Avalon Memory-Mapped Interface Specification" and "Avalon Streaming Interface Specification") Tutorials Using Nios II Tightly Coupled Memory Tutorial (ver 1.1, Jul 2008, 198 KB) Design Files for Tightly Coupled Memory Tutorial ( 17 MB) Nios II Hardware Development Tutorial (ver 2.5, Oct 2007, 922 KB) Design Files for Cyclone EP1C12 ( 6 KB) Design Files for Cyclone EP1C20 ( 6 KB) Design Files for Cyclone II EP2C35 ( 6 KB) Design Files for Stratix EP1S10 ( 6 KB) Design Files for Stratix EP1S10ES ( 6 KB) Design Files for Stratix EP1S40 ( 6 KB) Design Files for Stratix II EP2S60 ( 6 KB) Design Files for Stratix II EP2S60ES ( 6 KB) Design Files for Stratix II EP2S60 ROHS ( 6 KB) Product Overview 1080p video framework from Altera (ver 1.0, Apr 2008, 230 KB) Broadcast Solutions Supporting Altera's HD Quality Initiative (HDQI) (ver 2.0, Apr 2008, 2 MB) Accelerating applications on coprocessing platforms (ver 1.0, Jul 2007, 104 KB) Industrial Ethernet solutions from Altera (ver 1.0, Mar 2007, 114 KB) Rate This Page

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