Wireline

Altera continues to assist Communications Service Providers in using NFVi to innovate while addressing total cost of ownership (TCO) and scaling challenges. Altera and its partners continue to collaborate with customers to ensure targeted hardware, IP, and solutions for the deployment of virtual network functions (VNFs), cloud-native functions (CNFs), virtual Broadband Network Gateways (vBNG), and virtual Evolved Packet Core (vEPC). 

Whether it is data in transit or during processing, security throughout the communications spectrum has become a baseline requirement, provisioned through industry-standard network security protocols such as MACsec and IPsec/TLS/DTLS. 

Altera offers MACsec soft-IP with a baseline feature set that is typically relevant to most end-user applications. Additionally, Altera FPGAs can support Post-Quantum Cryptography (PQC) and IPSec/DTLS/TLS protocols in the datapath. 

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See FPGA IP for Network Security 

Altera FPGAs can be used to implement Gateway functions by providing flexible and reconfigurable hardware acceleration for various network functions. They support high-speed data processing and can be tailored to specific protocol requirements, making them ideal for handling diverse and evolving network traffic. 

Implementing FPGA-based Gateway functions can benefit from hard IP protocol support, such as Ethernet and PCIe, enabling seamless integration with existing network infrastructure. They also support high channel rate transceivers, with capabilities up to 116Gbps, ensuring efficient data transmission.

Altera FPGAs can implement routing and switching applications by leveraging hard IP protocols like Ethernet and PCIe, which are essential for high-speed data transfer and communication. The integration of hard crypto blocks in selected Agilex FPGA variants saves fabric space and power, making them suitable for secure data transmission in routing/switching infrastructure. 

Additionally, the Altera FPGAs support advanced memory technologies such as HBM2E, DDR4, DDR5, LPDD4, and LPDDR5, which are critical for handling large data volumes and ensuring fast access times for data buffering or Search functions (like ACL / LPM via Altera provided IP). The large fabric of FPGAs supports high frequency designs, enabling them to meet the demanding performance requirements of modern networking applications. This flexibility and performance make FPGAs an ideal choice for implementing complex routing and switching functions. 

The Optical Transport Network protocol (OTN) from the ITU-T standardization group is the universal protocol for combining and transmitting multiple different communication signals over a common optical signal, for transmission over Dense Wavelength Division Multiplexing (DWDM) networks, and for interoperation between optical networks of different operators. OTN offers extensive Operation, Administration, and Maintenance (OAM) features, very stable latency, and fast protection. 

The extension ‘Beyond 100G OTN’ (B100G OTN) allows for transmission up to 800 Gbps and further extensions are being worked at. The ‘Flexible OTN’ extension (FlexO) allows B100G OTN to take advantage of optical modules and sets of optical modules designed for Ethernet but is able to run at OTN data rates which are a few percentage points higher than those of Ethernet. 

 
The (re)programmability of the FPGA is a perfect match with the flexibility of OTN. The ‘partial reconfiguration’ function is particularly useful because that allows to shift between protocols on some interfaces without interrupting the ongoing traffic on all other interfaces. The FPGA can also dynamically change the rate and the NRZ/PAM4 modulation scheme of its interfaces and an FPGA solution can be remotely updated in-field for the support of new services, new features, or extensions to the standard. It can also be used to build ‘universal hardware boards’ so the same hardware board can be used for different networking usecases depending on how it is programmed. In this manner, the FPGA can de-risk and future-proof investments and allow system vendors to differentiate their solutions from other vendors’ solutions. 

Altera offers FPGAs with best-in-class performance for OTN solutions but has also a huge library of readymade OTN IP cores (FPGA programming modules) that can help customers get to market faster to . Altera can also facilitate complete(d) OTN solutions (aka. virtual ASSPs) based on customer specifications

The Flex Ethernet protocol (FlexE) aggregates multiple Ethernet flows on a single optical interface with an option to adjust the capacities of the individual MAC flows up and down. The individual Ethernet flows are kept entirely isolated from each other so the performance of one flow in no way can affect the quality of another.  

FlexE is standardized in the Optical Interconnect Forum (OIF). ITU-T has defined the Metro Transport Network protocol (MTN) which builds on FlexE. 

FPGAs can augment the capabilities of your packet switch/router system or implement the uplink of your edge system with FlexE. FPGAs can also turn a single-channel Ethernet connection into a flexible multichannel solution that supports multiple Ethernet channels. 

 
Altera FPGAs offer all the foundational functions for creating FlexE solutions: flexible transceivers, Forward Error Correction functions (FEC), and Ethernet PCS. Furthermore, Altera can offer a FlexE IP core that implements the rest of the FlexE protocol as well as an Ethernet Multi-MAC IP core that supports multiple parallel MAC functions with adjustable capacity. The Multi-MAC IP core works seamlessly with the FlexE ‘front-end’. Altera FPGAs make it easy to build solutions that combine FlexE with OTN protocols. 

The Private Line Emulation protocol (PLE) enables the bit-level transparent transport of OTN as well as of other service protocols with IP routers, i.e. without the need for dedicated OTN systems and networks. 

PLE is being standardized within the Internet Engineering Task Force (IETF) and specifies a method for encapsulating high-speed bit-streams as Virtual Private Wire Service (VPWS) over Packet Switched Networks (PSN). 

PLE breaks the bit-stream of the client service (e.g. OTN) up into equal sized packets which are encapsulated into Ethernet / MPLS packets which can be transported through IP networks over MPLS label-switched paths or Ethernet Pseudo-wires. At the other end of the network the PLE function will even out latency variations between the PLE packets and re-establish the original bit-stream including the inherent clock of the original bit-stream. 

The Altera FPGA is a perfect technology for the implementation of PLE solutions. The FPGA allows ongoing adaptation to an evolving standard and with the FPGA the PLE solution can be tailor made to customers existing systems. Based on Altera FPGA and Altera IP cores customers can also combine the PLE protocol with OTN, Ethernet, IP/MPLS, PTP/SyncE protocols to create systems that interwork seamlessly with existing networks.