Training Partners: NSCAD Microeletronica
The NSCAD Microeletronica (Microelectronics CAD Support Group) is a support and Electronic Design Automation (EDA) software training group established to assist the Brazilian microelectronics sector by giving guidance and assistance in projects that lead to IC implementation.
Established in May of 2005 by FINEP (Federal Financing Agency for Studies and Projects), the NSCAD Microeletronica initiative has financial assistance from the Brazilian Government and has basic logistical support from the Federal University of Rio Grande do Sul (UFRGS).
NSCAD Microeletronica offers consulting services for start-ups on ASIC design, EDA tool integration, process technologies, FPGA prototyping for ASIC verification, and support services on ASIC design flow automation and EDA environment management.
The goal of NSCAD Microeletronica is to develop human resources through the use of industry-standard EDA tools that are required for advanced technology projects, stimulating the growth of high-technology companies in Brazil. NSCAD Microeletronica has expertise in secure communication (RSA, AES, and cryptography logic design for SoC integration) and consumer markets. In addition to ASIC prototyping (design partitioning across multiple FPGAs, code portability, gated clock, and design constraints analysis), NSCAD Microeletronica technology expertise includes:
- ASIC prototyping
- Ethernet
- HDLC
- VGA
- Audio and video processing
- Digital signal processing (DSP)
- DTV
- H.264/AVC high-definition real-time streams
Instructor-Led Training
NSCAD Microeletronica provides the following instructor-led courses in Brazil.
| Course Title |
Description |
| Introduction to VHDL |
Learn the VHDL high-level hardware description and design language, and its use in programmable logic design. |
| Introduction to Verilog HDL |
Learn how to implement basic constructs and modeling structures in the Verilog HDL high-level hardware description and design language to create an optimal FPGA design. |
| The Quartus II Software Design Series: Foundation |
Learn the basics of Quartus® II design software, including pin planner, device I/O assignments, clock and I/O constraints assignment , and analysis of clock and I/O timing to develop an FPGA or CPLD. |
The Quartus II Software Design Series:
Verification |
Explore the advanced features of Quartus II software, including SignalTap® II, ModelSim®, incremental design changes, in-system memory content editor, and embedded logic analyzer that will enable you to verify your FPGA design. |
| The Quartus II Software Design Series: Optimization |
Learn how to shorten your design cycle as well as improve your design performance and utilization using the LogicLock™ regions, incremental compilation, top-down and bottom-up design flows, HDL coding styles, design space explorer, and power consumption reduction features of Quartus II software. |
| Designing with the Nios II Processor and SOPC Builder |
Learn how to integrate design in a Nios® II 32-bit microprocessor and implement it as an embedded soft processor complete with HAL API functions in an Altera® FPGA. Then, integrate the Nios II 32-bit microprocessor and test it in an Altera FPGA. Learn how to configure and compile designs using Quartus II software and the SOPC Builder tool as well as how to develop and run embedded software in the Nios II Integrated Development Environment (IDE). |
Contact Information
NSCAD Microeletronica
Av Bento Goncalves, 9500
Bloco IV – Predio 43424 – Sala 107
Bairro Agronomia, Campus do Vale
Porto Alegre, Rio Grande do Sul, Brasil
CEP 91501-970
Phone: +55-51-3308-7023
Fax: +55-51-3308-6160
Email: nscad@inf.ufrgs.br
http://www.nscad.org.br/index.php?option=com_content&task=view&id=27&Itemid=39
|
Literature
> 
