| Table 1. PLD Industry Innovation Firsts |
| Year |
Technology Milestones |
PLD Industry Innovation Firsts |
| 2008 |
Stratix® IV FPGAs |
Industry's first 40-nm FPGAs, with highest density, highest performance, lowest power, highest transceiver bandwidth (up to 8.5-Gbps transceivers), and hard intellectual property (IP) blocks for PCI Express Gen 1/2. |
| 2008 |
HardCopy® IV ASICs
|
Industry's first 40-nm HardCopy ASIC includes a 6.5+-Gbps transceivers option |
| 2007 |
Arria® GX FPGAs |
Industry's first low-cost, transceiver-based, and protocol optimized FPGAs |
| 2007 |
Cyclone® III FPGAs |
Industry's first low-cost 65-nm FPGA featuring an unprecedented combination of low power, high functionality, and low cost |
| 2006 |
Stratix III FPGAs |
65-nm FPGAs featuring support for increased levels of integration and complexity with higher densities and performance |
| 2006 |
Quartus® II software |
Native support for SDC design constraints |
| 2006 |
Nios® II C2H acceleration compiler |
First automated ANSI C to register transfer level (RTL) generation tool for embedded processors |
| 2006 |
Stratix II GX FPGAs |
Fastest and highest-density 90-nm FPGA fabric with up to 20 low-power transceivers that operate between 622 Mbps to 6.375 Gbps |
| 2005 |
HardCopy II ASICs |
Fine-grained architecture; seamless migration from the 90-nm Stratix II FPGA prototype |
| 2005 |
Cyclone II FPGAs |
90-nm FPGAs featuring 30 percent lower cost and three times the density of the industry’s first low-cost FPGA |
| 2004 |
Stratix II FPGAs |
90-nm FPGAs in which 8-input "fracturable" look-up table (LUT) called an ALM replaced the 4-input LUT architecture |
| 2004 |
Nios II embedded processor |
World's most versatile embedded processor |
| 2003 |
Quartus II software |
Programmable logic software package offers Tcl scripting support |
| 2003 |
Stratix GX FPGAs |
.13-µm FPGAs with quad transceiver architecture |
| 2003 |
HardCopy ASICs |
Industry’s only complete prototype-to-volume production .13-µm solution |
| 2003 |
Stratix FPGAs |
.13-µm, 300-mm, high-speed, high-density FPGAs |
| 2002 |
Quartus II software |
Programmable logic design toolset offers Linux support |
| 2002 |
Cyclone FPGAs |
World's lowest-cost FPGA (.13 µm) |
| 2002 |
SOPC Builder |
First FPGA automated system generation tool |
| 2002 |
Stratix FPGAs |
World's first FPGA with embedded DSP blocks |
| 2001 |
HardCopy APEX™ ASICs |
The first seamless FPGA migration to low-cost HardCopy ASIC |
| 2001 |
System interconnect fabric |
First automatically generated interconnect fabric that supports simultaneous master/slave transactions |
| 2001 |
Quartus II software |
Quartus II design software introduced |
| 2001 |
Mercury™ FPGAs |
World's first .18-µm FPGA with embedded transceivers |
| 2000 |
ARM®-based Excalibur™ devices |
World's first FPGA with hard embedded processor |
| 2000 |
Nios embedded processors |
World's first embedded processor optimized for programmable logic |
| 1999 |
Intellectual property (IP) |
Altera's IP MegaStore website launched |
| 1999 |
APEX EP20K1500E FPGAs |
Industry's first PLD with more than 1.5 million gates |
| 1999 |
Quartus software |
Embedded logic analyzer (SignalTap®) |
| 1998 |
Quartus software |
Support for encrypted IP cores |
| 1997 |
Quartus software |
GUI to configure parameterized modules and IP cores (MegaWizard®) |
| 1996 |
FLEX 10K® FPGAs |
FPGA with integrated phase-locked loop (PLL) |
| 1995 |
FLEX 10K FPGAs |
FPGA with embedded block RAM |
| 1994 |
MAX® 9000 CPLDs |
JTAG in-system reprogrammable CPLD |
| 1993 |
Quartus software |
Support for library of parameterized modules (LPM) |
| 1992 |
FLEX® 8000 FPGAs |
Altera's first field programmable gate array (FPGA) |
| 1991 |
MAX+PLUS® II software |
Windows-based logic design toolset |
| 1988 |
MAX+PLUS II software |
Full-featured integrated graphical CAD environment for logic design |
| 1988 |
MAX 5000 CPLDs |
World's first high-density complex programmable logic device (CPLD). Patented redundancy technology delivers reduction of defects and increased yields (first introduced in .65 µm, this key technology continues to deliver increased yields in Altera 65-nm devices today.) |
| 1985 |
EP1200 |
Industry's first high-density CMOS PLD |
| 1984 |
A+PLUS software |
Industry's first PC-based development system |
| 1984 |
EP300 device and die |
World's first programmable logic device (PLD) |
| 1983 |
Demonstration box |
Altera's first demonstration box, "T-bird Tail Lights" |
| 1983 |
- |
Altera Corporation founded |
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